:-) Sorry about that. I had to do it that way to minimise the memory
footprint.
> Anyway, how does the kernel find out how to program the MTRR
> registers for the framebuffer, or does is simply export services that
> user land code can call the enable MTRR write combining for the LFB?
> If it allows user land app (like our code!) to do this, what is the
> system call for this and is there any documentation on it?
The kernel exports an interface that may be used by userspace
programmes (by frobbing /proc/mtrr) or by kernel modules calling
mtrr_*() functions. The MTRR interface doesn't decide what regions
should be set: that's someone else's job.
FYI: XFree86 4.0 should automatically use this interface.
> One of the reasons why I am curious is that it is vitally important
> when you re-program the MTRR's for the hardware linear framebuffer of
> the graphics device that you don't simply block enable it for the
> entire amount of memory that the PCI device has mapped. The reason
> for this is that many cards (ATI is one) map their MMIO registers at
> the end of the framebuffer memory, and if you enable write combining
> on the MMIO registers the acceleration code freaks out and does not
> work properly. In order for this to work properly you can only enable
> it up to the next 512Kb boundary before the MMIO registers (since the
> MTRR's require a 512Kb aligned length to work properly).
No problem. The MTRR support allows you to "overlay" an uncachable
region over a write-combining region. This was done specifically to
suppot the situation you describe. I should get around to updating the
documentation to make this clear. It's been on my ToDo list for months
now :-(
Regards,
Richard....
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