Re: Level-Triggered Interrupt Advice Seeked.

Richard B. Johnson (root@chaos.analogic.com)
Mon, 13 Jul 1998 10:51:58 -0400 (EDT)


On Mon, 13 Jul 1998, Jason Wohlgemuth wrote:

> Okay... I understand the majority of that. Maybe I was confusing
> the issue by using the ACK term. I appreciate your help though!
>
> Specifically, I need to end the interrupt after running the
> handler. I understand stand that this is standard practice and it
> was accomplished with the DOS drivers of this card by doing:
>
> if (irq > 7)
> outp(0xa0,0x20);
> outp(0x20,0x20);
>

An interrupt handler within the kernel should not worry about the
interrupt controller. In other words, do not do this! The kernel
handles the controller for you.

> also in some other posts I have read regarding this same situation
> in Linux have stated :
>
> "So, if you ack a level triggered interrupt without prior clearing
> of the interrupt condition will immediately raise another one. If
> you disable that interrupt by setting int-destination to 0, it is
> not really disabled, just the delivery is disabled."
>

As shown previously, the input bit to the controller is shut off
while your ISR is executing. It is turned back on after your
procedure returns.

If you get a "flood" of interrupts, then your handler is not properly
handling _all_ the conditions that can cause an interrupt. Your ISR
must do this. Often it involves reading and throwing away stuff you
don't even care about, but the read must be done to clear pending
interrupt requests.

For instance, if I write a handler for the 8250 UART, and it is connected
to a level interrupt, I have a problem if the UART is programmed to
interrupt on TX buffer empty and I have no more characters to transmit.

What the ISR must do is turn off that function (only) until I have more
characters to transmit. Further, changing the programming of the UART
"on-the-fly" may cause status changes which must be cleared by reading
the interrupt status register --and probably throwing away the
information I already derived. In this trivial case, the UART has
a bit that echos exactly what its interrupt request line is doing.
Once this bit is cleared, the needs of the hardware have been handled
and the interrupt service routine is complete.

Cheers,
Dick Johnson
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