Philip Blundell wrote:
>
> >The SPARC bitops.h code is ...hummm... interesting. It reads (quoting):
> >
> >/* User mode bitops, defined here for convenience. Note: these are not
>
> Those are the user-mode versions, not used in the kernel. Look further down
> the file for the kernel implementations (the guts of which are in arch/sparc/
> lib/bitops.S).
>
> p.
Indeed, the SPARC Linux implementation defines a "user-mode" non-atomic
test_and_set_bit(). The convenience of this feature is questionable,
IMHO, but then again I could never afford a SPARC box :-)
Just another remark on the i386 implementation of test_and_set_bit().
The bit test and set opcode in the test_and_set_bit() function
definition is preceded by the LOCK_PREFIX expression defined a few lines
above as:
#ifdef __SMP__
#define LOCK_PREFIX "lock ; "
#else
#define LOCK_PREFIX ""
#endif
Some people build SMP kernels regardless of having a single or more
processors. With a single processor, the net effect of the extra
unneeded lock prefix is a double performance loss: 1) a memory cycle
loss to read each lock prefix 2) since locked instruction cycles are
noncacheable, this can result in the loss of _many_ clock cycles.
Regards,
------------------------
André Balsa
andrebalsa@altern.org
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