> Sorry, but I *am* right. Look carefully at the code. It is *impossible*
> for the Cyrix to generate a divide-by-zero Oops (which has been
> experimentally verified by numerous sources) *unless* the Cyrix is
> zero-ing the top 32 bits of the TSC on HLT. I call that "destroying the
> TSC".
I was right on this point, but just barely. It *is* impossible to
generate a divide-by-zero for the results I enumerated. But the Cyrix
Oops, although a divide error, is actually a divide *overflow*, and is not
in fact caused by zeroing the top bits.
> It is impossible to Oops if the Cyrix is just stopping the TSC.
> The times will be off, but no Oops.
This point, however, was wrong. Oops. ;-)
More details on this later; I'm working on recoding the TSC stuff to be
sane: ie, only calibrate the TSC once and do sensible things for
Cyrixes, Centaurs, and machines with APM. Oh --- it should be faster than
the present code, too. =)
--Scott
@ @
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C. Scott Ananian: cananian@lcs.mit.edu / Declare the Truth boldly and
Laboratory for Computer Science/Crypto / without hindrance.
Massachusetts Institute of Technology /META-PARRESIAS AKOLUTOS:Acts 28:31
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PGP key available via finger and from http://www.pdos.lcs.mit.edu/~cananian
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