Re: Cyrix 6x86MX and Centaur C6 CPUs in 2.1.102

Phil's Kernel Account (kernel@eiterra.nls.net)
Mon, 18 May 1998 13:06:06 -0400 (EDT)


On Mon, 18 May 1998, Alan Cox wrote:

#> if ((boot_cpu_data.x86_capability & 16) && (boot_cpu_data.x86_vendor !=
#> X86_VENDOR_CYRIX) && (boot_cpu_data.x86_vendor != X86_VENDOR_CENTAUR)) {
#
#This is also slightly wrong. Only step 0 of the centaur C6 has the RDTSC
#power bug according to the errata documents. I think it should read
#the above + if the CENTAUR case & stepping==0)
#That sound right ?

Now that I'm more awake than last night ;), I can't say whether or not
this is correct. I won't touch Centaurs. However, it's possible, maybe
probable. If anyone would like to volunteer to check for us, it'd be
greatly appreciated. :)

if ((boot_cpu_data.x86_capability & 16) && (boot_cpu_data.x86_vendor !=
X86_VENDOR_CYRIX) && (boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR
(boot_cpu_data.x86_stepping == 0))) {

That may or may not be correct, probably not. I'm still not entirely
awake, and I threw that together in my head in a second or two. However,
you get the gist of the idea, right? :)

For those of you who don't...

If x86_capability & 16 and VENDOR != Cyrix and VENDOR == Centaur and
STEPPING == 0...

yaddayadda. :) Why risk breaking CPUs that aren't already 'broken?' ;)

-Phil R. Jaenke (kernel@nls.net / prj@nls.net)
TheGuyInCharge(tm), Ketyra Designs - We get paid to break stuff :)
Linux pkrea.ketyra.INT 2.0.33 #15 Sat Apr 18 00:40:21 EDT 1998 i586
Linux eiterra.nls.net 2.0.33 #15 Fri Apr 17 00:22:13 EDT 1998 i586
- Linus says for 'brave people only.' I say 'keep a backup.' - :)

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