> I was wondering if any of the 384K RAM between 640K-1M, not being used by
> adapters or shadowing, might be usable for something. I can't remember if
> this area was set aside by DOS or by the PC's original architecture. It
> seams wasteful to continue to just mark it as reserved. If usable, some of
> this memory could give some of those memory starved machines out there some
> more breathing room.
Once I was playing with this on Intel Triton... The following patch gains
260KB of memory (actually it breaks some things like dosemu), but I had
never enough time to play with it more.
Anyway, a good solution would be adding some "include/exclude" command-line
parameters which would allow inclusion and exclusion of memory blocks during
MM initialization. This would give us an ability to use UMB regions (you can
just set them as R/W shadow in many BIOS'es) and exclude problematic regions
on ThinkPads (the page at 0x9f000) and lots of other interesting hacks.
Anyone willing to implement this?
The only caveat I know of is that such memory is not L2-cacheable on some
chipsets.
Have a nice fortnight
-- Martin `MJ' Mares <mj@ucw.cz> http://atrey.karlin.mff.cuni.cz/~mj/ Faculty of Math and Physics, Charles University, Prague, Czech Rep., Earth "Anyone can build a fast CPU. The trick is to build a fast system." -- S. Cray
--- arch/i386/mm/init.c.old Tue May 6 19:15:07 1997 +++ arch/i386/mm/init.c Tue May 6 19:20:05 1997 @@ -26,6 +26,7 @@ #include <asm/uaccess.h> #include <asm/pgtable.h> #include <asm/dma.h> +#include <asm/io.h> const char bad_pmd_string[] = "Bad pmd in pte_alloc: %08lx\n"; @@ -292,6 +293,7 @@ #endif start_mem = PAGE_ALIGN(start_mem); +#ifdef NO_DIRTY_MM_TRICKS_FOR_TRITON /* * IBM messed up *AGAIN* in their thinkpad: 0xA0000 -> 0x9F000. * They seem to have done something stupid with the floppy @@ -301,6 +303,29 @@ clear_bit(PG_reserved, &mem_map[MAP_NR(start_low_mem)].flags); start_low_mem += PAGE_SIZE; } +#else + /* + * These hacks are only for Intel Triton chipsets, so we don't + * expect any odd ThinkPad behaviour. + */ + while (start_low_mem < 0xa0000+PAGE_OFFSET) { + clear_bit(PG_reserved, &mem_map[MAP_NR(start_low_mem)].flags); + start_low_mem += PAGE_SIZE; + } + save_flags(tmp); /* Mark 0xc0000-0xcffff as readable, writeable and cacheable */ + cli(); + outl(0x80000058, 0xcf8); + outl((inl(0xcfc) & 0x000000ff) | 0x77777000, 0xcfc); + outl(0x8000005c, 0xcf8); + outl(0x77777777, 0xcfc); + outl(0, 0xcf8); + restore_flags(tmp); + start_low_mem = PAGE_OFFSET + 0xc0000; /* And add them to the memory pool */ + while (start_low_mem < 0x100000+PAGE_OFFSET) { + clear_bit(PG_reserved, &mem_map[MAP_NR(start_low_mem)].flags); + start_low_mem += PAGE_SIZE; + } +#endif while (start_mem < end_mem) { clear_bit(PG_reserved, &mem_map[MAP_NR(start_mem)].flags); --- arch/i386/kernel/bios32.c.old Tue May 6 19:46:59 1997 +++ arch/i386/kernel/bios32.c Tue May 6 19:51:35 1997 @@ -889,6 +889,7 @@ * */ +#ifdef NO_DIRTY_MM_TRICKS_FOR_TRITON for (check = (union bios32 *) __va(0xe0000); check <= (union bios32 *) __va(0xffff0); ++check) { @@ -921,6 +922,12 @@ } if (bios32_entry && check_pcibios()) access_pci = &pci_bios_access; +#else + /* We must disable PCI BIOS support for the Triton MM hack, + * but we can simply use direct access instead. + */ + access_pci = check_direct_pci(); +#endif #endif return memory_start; }
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