Re: How to compile a Pentium II
Noah Beck (noah@ecn.purdue.edu)
Fri, 15 May 1998 15:32:46 -0500
H. Peter Anvin wrote:
> Not really, but it's a technologically simpler device. Read: a PII
> (Klamath) at the same frequency is slower than a PPro. However, it
> seems Intel aren't as savvy at building SRAM as they are building
> processors (which they are very savvy at), and the 1:1 in-package
> custom cache die of the PPro in the end apparently turned out to be
> clock-limiting and cost inefficient. You may want to note the Klamath
> is a lot cheaper than the PPro (especially the PPro-512K) and is
> available at higher frequencies.
>
> However, a *major* limitation of the Klamath and the other Slot 1
> processors is the limitation to two processors and 512 MB RAM.
Slot 1 processors still have 36 address lines for 64GB RAM, and
some of the last 333MHz P-II's as well as all of the 350 and 400
MHz P-II's have up to 4 GB cacheable (previous P-II's were 512 MB
cacheable) RAM. I don't know how much RAM the chipsets support,
though. I looked up the 4 GB cacheable figure the other day because
I saw somebody order a 400MHz P-II with 1GB RAM and wondered if
that was going to be a slow system.
Two processors is still a limit, though. Xeon or whatever it's
called will be the intended upgrade path for large PPro systems.
Noah
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