> Does the IO-APIC code handle PCI busses behind PCI-PCI bridges
> correctly?
The following patch tries to fix it. Please try it if you experience
any IO-APIC vs. PCI-to-PCI bridge problems.
Have a nice fortnight
-- Martin `MJ' Mares <mj@ucw.cz> http://atrey.karlin.mff.cuni.cz/~mj/ Faculty of Math and Physics, Charles University, Prague, Czech Rep., Earth "IBM = Idiots Buy Me"
--- ./arch/i386/kernel/bios32.c.mj Wed Apr 22 14:45:27 1998 +++ ./arch/i386/kernel/bios32.c Wed Apr 22 14:48:52 1998 @@ -973,7 +973,10 @@ int irq; unsigned char pin; - pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); + if (dev->bus == &pci_root) + pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); + else /* Behind PCI-to-PCI bridge => use interrupt pin of the bridge */ + pci_read_config_byte(dev->bus->self, PCI_INTERRUPT_PIN, &pin); if (pin) { pin--; /* interrupt pins are numbered starting from 1 */ irq = IO_APIC_get_PCI_irq_vector (dev->bus->number, PCI_SLOT(dev->devfn), pin);
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