> I have been trying to understand PCI and the IO-APIC code. Is IO-APIC
> available on non-smp machines, or on a SMP motherboard with only one
> chip in it? It seems like a newer/faster/better way of doing interrupts
> that breaks PCI away from ISA concepts, is this accurate? If so these
> are true does 2.1.8x support the IO-APIC on non-smp?
the IO-APIC chip is only available in SMP boards currently. A large
portion of it's functionality makes only sense on SMP: routing IRQs to
multiple CPUs. I found APIC interrupts much faster than 'normal'
(so-called INTA cycle interrupts), as the CPU does not have to fetch the
IRQ vector from external circuity (the 8259A normally). It takes 9
microseconds to execute the first assembly instruction with 'old-style'
(XT-PIC) interupts on a pentium, with APIC interrupts it's in the range of
1-2 microseconds ... so it's a big win, even without its (much more
important) SMP features.
the 'local APIC' is a different thing, it's usually integrated onto
Pentium (and higher) CPUs, and thus is there on non-SMP boards too. But
the local APIC is just half of the game to get more IRQs ...
-- mingo
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