Strange. My machine is over a year old, and the BIOS has never been
updated.
It seems that this kind of stuff is just typical of most PC component
manufacturers.
>
> BTW -- when you say that you don't have the problem do you mean that
> passive release is already enabled on your board? Aaccording to the
> Intel document the problem occurs when "The USWC Write Posting during I/O
> bridge access enable (UWPIO) bit is set to 1. This bit is located in
> DBC (DBX Buffer Control) bit #5 in PMC at address offset 53h."
>
I mean that the Passive Release Enable bit is set by the BIOS. So the
patch I posted has no effect, since the bit is found to be set when
Linux boots - I even added a printk in there to make sure.
> This bit seems to be controlled by the write posting/combining settings
> in the bios -- If I shut these off the bit isn't set but the video
> performance is poor even with the mtrr patch which I guess makes
> sense because write combining is off even if the mtrr region is set
> up.
I've never actually confirmed that the UWPIO bit is set, but
write-combining certainly improves video performance so it must be. My
BIOS configurator doesn't seem to have options for it.
-- Dave Wragg