Re: New Intel Bug! Only affects memory read performance

Rob Hagopian (hagopiar@vuser.vu.union.edu)
Thu, 25 Dec 1997 14:07:30 -0500 (EST)

Which is about the same amount of time as it takes to store (and later
reload) the FPU registers... And I'm not sure this is true on the Pentium
II, which I believe incorporates speedups in this area. IIRC, the memcpy
patch anticipates this and you only actually use the FP moves on breakeven
or better performance.
-Rob H.

On Thu, 25 Dec 1997, Myrdraal wrote:

> On Thu, Dec 25, 1997 at 12:17:28AM -0800, Jeffrey B. Siegal wrote:
> Hi,
> > [snip]
> > Supposedly (but I haven't investigated this myself) the MMX
> > instructions are a lot faster than the floating point instructions; using
> > them might produce a Pentium (MMX) memcpy patch with less of a penalty when
> > the destination is in L1.
> I don't think that would be feasible, due to the long time it takes to
> switch to/from MMX mode.
> > [snip]
> -Myrdraal
>