I have written a driver for the ComputerBoards CIO-DAS 16/M1 A/D
board. This ISA bus board can do 12 bit A/D conversions up to 1MHz.
The board has an onboard FIFO of 1024 x 2 bytes, and interrupts when
the FIFO is half full (512 samples) or when the total count = 0.
In my interrupt service routine, I read 512 samples (using the
pentium rep instruction), and test for FIFO overflow. cli(); is the
first statment in the ISR.
If I sample less than 1024 samples (up to 900 KHz) or sample under
100KHz (any sample size), everything works great. Here is what happens
under the following conditions:
I grounded HI to LOW so the board should read 0 Volts which corresponds to
the value 0 on 0 to 5V full scale. I have an internal Kernel buffer,
which I initialized each element to the value 0xc5cf.
Under 1024 samples or under 100 KHz, I get 0 in the buffer. No problem
there. Otherwise (say at 200KHz), I see 0's and the number 4095 appear
in clusters. The higher the freq, the more clusters of 4095 I see. I
never see the number 0xc5cf, and the bit on the board to signal
buffer overflow is never set. I also printk() when I get into the
ISR, and it is interrupting the correct number of times.
Question:
Is there a watchdog timer or something in the kernel which is
preempting my ISR? What is weird is that values are being written
into the buffer, and the board thinks that the FIFO is being read the
correct number of times, only that the value 4095 is being placed
there.
I know there are limitations on the bandwidth of the ISA bus,
interrupt latency time etc. However, I thought I would see something
different if this were the case.
The full driver is available from
ftp://lx10.tx.ncsu.edu/pub/Linux/drivers/CIO-DAS16-M1.1.0b.tar.gz
Any insight would be appreciated.
-- Warren
Warren J. Jasper
wjasper@tx.ncsu.edu