You're certainly right. But IBM tends to be better than most at making
up names that don't match the rest of the industry.
> > Making it external to
> > the CPU doesn't make it a page table, it only makes it slower (but in all
> > fairness it also makes it bigger, which is obviously why they do it).
>
>It makes it slower than an on-chip TLB, but it's still likely to be
>faster than a TLB miss (I assume they have an on-chip TLB as well).
I'm not convinced. For example, the alpha has software filled TLB
entries, and uses a clever scheme that maps the page tables into virtual
address space. The end result is that you can generally refill the TLB
with just a single memory load even though you conceptually traveled
three levels worth of page tables.
Using a hash-table gives you pretty much the same end result (usually
you can refill the TLB with a single memory operation). But locality is
going to be worse, _and_ you have the overhead of maintaining the hash
table (which is not an issue for steady-state things like long FORTRAN
jobs, but it can be quite expensive if you do lots of process creation
or change your virtual memory maps often).
Linus