> Hi, every one
> I read the ioremap source of Linux-2.1.x and find the kernel doesn't care
> about the Pentium new bit setting PWT ( page cache write through ) and PCD
> ( page cache disable ), only PCD is defined but never used in the kernel source.
check out include/asm-i386/io.h:ioremap_nocache(), that function was added
around ~2.1.30. It sets the PCD flag. It's unclear (to me at least) what
effect this has on PCI space memory caching. (i thought that area was
uncacheable always, but there was at least one memory-mapped [custom] PCI
device where this function prevented strange crashes ... so it seems to
have some effect).
about the PWT bit. if it's needed, __ioremap(flags) can be called with any
caching flag. (which will be written into the page table entry). Is there
any RL use for the PWT bit?
-- mingo