What kind do you have? I had to hack mine up to the LEDs to show up in
the front i.e., desolder the LEDs from the ISA board (you are supposed to
look at the board to use it in the shipped form), solder in a ribbon cable
into the resulting empty pin-holes(via's) and then hack up the clock led
baord etc.. it works well enough but it is an ugly hack.
I have the "fancier" model from JDR Micro Devices. I only use it on my test
machine, which usually has its motherboard visible anyway, so making the LED
signals available externally is not an issue for me.
Oh yeah... Darn. Is this necessary? Can I change these calls back to the
jumps or maybe to another address? How about a read CPUID, that is
synchronizing and should slow down things nicely (though it does change a
register... uk, never mind)? Would a write back invalidate of the
current instruction L1 cache line be OK? That should cause a nice slow
down.
I once tried to change it back to the jumping version and my system wouldn't
boot. I too would prefer if we could find another instruction that would slow
down I/O enough without mucking with the port 0x80 value. I think the issue
here is that the slowdown needs to be relative to the speed of ISA bus access,
not memory or processor speeds. There surely must be another I/O port that can
be safely read or written, but I'm not expert enough in these details to
suggest one.
Leonard