This is a valid approach for division, but it's sadly totally braindamaged
for multiplication, because it makes it much harder to do pipelined
multiplies (not impossible, but you have to have rename logic etc for the
extra registers, and then the extra registers start to look all the more
braindead).
Pipelined multiplication seems to be what the high-end chips are starting
to do, because it actually does make a difference for some things if you
can multiply quickly.
So MIPS may be doing the right thing wrt division, but they did royally
screw up wrt multiplication.
Linus