Re: [PATCH RFC v2 4/6] arm64: dts: qcom: sm8450-hdk: Enable I2S for HDMI

[Neil Armstrong]

On 10/9/25 14:37, Konrad Dybcio wrote:
> On 10/8/25 8:56 PM, Neil Armstrong wrote:
> > Add the necessary nodes to configure the right I2S interface
> > to output audio via the DSI HDMI bridge.
> >
> > Signed-off-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx>
> > ---
> >   arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 26 +++++++++++++++++++++
> >   arch/arm64/boot/dts/qcom/sm8450.dtsi    | 40 +++++++++++++++++++++++++++++++++
> >   2 files changed, 66 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
> > index 0c6aa7ddf43263f30595b3f0733ec3e126e38608..7b822086a57c600ae9b5668d6d7a375d0ec55fa7 100644
> > --- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
> > +++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
> > @@ -667,6 +667,8 @@ lt9611_codec: hdmi-bridge@2b {
> >   		pinctrl-names = "default";
> >   		pinctrl-0 = <&lt9611_irq_pin &lt9611_rst_pin>;
> >   
> > +		#sound-dai-cells = <1>;
> > +
> >   		ports {
> >   			#address-cells = <1>;
> >   			#size-cells = <0>;
> > @@ -1016,6 +1018,14 @@ &sound {
> >   			"TX SWR_INPUT0", "ADC3_OUTPUT",
> >   			"TX SWR_INPUT1", "ADC4_OUTPUT";
> >   
> > +	pinctrl-0 = <&i2s0_default_state>, <&audio_mclk0_default_state>;
> > +	pinctrl-names = "default";
> > +
> > +	clocks = <&q6prmcc LPASS_CLK_ID_PRI_MI2S_IBIT LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> > +		 <&q6prmcc LPASS_CLK_ID_MCLK_1 LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
> > +	clock-names = "primart-mi2s",
>
> "primary-mi2s"
>
> [...]

Damn typo

> > +			audio_mclk0_default_state: audio-mclk0-default-state {
> > +				pins = "gpio125";
> > +				function = "pri_mi2s";
> > +				drive-strength = <8>;
> > +				bias-disable;
> > +				output-high;
> > +			};
> > +
> > +			i2s0_default_state: i2s0-default-state {
> > +				sck-pins {
> > +					pins = "gpio126";
> > +					function = "mi2s0_sck";
> > +					drive-strength = <8>;
> > +					bias-disable;
> > +					output-high;
>
> I doubt output-high for a clock pin is what you want..

This was copied from downstream:

================><============================
		i2s0_sck_active: i2s0_sck_active {
<snip>
			config {
				pins = "gpio126";
				drive-strength = <8>;   /* 8 mA */
				bias-disable;           /* NO PULL */
				output-high;
			};
<snip>
		i2s0_ws_active: i2s0_ws_active {
<snip>
			config {
				pins = "gpio129";
				drive-strength = <8>;   /* 8 mA */
				bias-disable;           /* NO PULL */
				output-high;
			};
================><============================

And also set the same way arch/arm64/boot/dts/qcom/sm4250.dtsi

And I guess this level would only set when the function is not active.

Neil

> > +				};
> > +
> > +				data0-pins {
> > +					pins = "gpio127";
> > +					function = "mi2s0_data0";
> > +					drive-strength = <8>;
> > +					bias-disable;
> > +				};
> > +
> > +				data1-pins {
> > +					pins = "gpio128";
> > +					function = "mi2s0_data1";
> > +					drive-strength = <8>;
> > +					bias-disable;
> > +				};
> > +
> > +				ws-pins {
> > +					pins = "gpio129";
> > +					function = "mi2s0_ws";
> > +					drive-strength = <8>;
> > +					bias-disable;
> > +					output-high;
>
> here too
>
> Konrad