Re: [PATCH RFC 2/5] dt-bindings: power: Add Marvell PXA1908 domains
From: Krzysztof Kozlowski
Date: Fri Aug 15 2025 - 02:09:21 EST
On 15/08/2025 00:08, Duje Mihanović wrote:
> On Monday, 11 August 2025 08:38:15 Central European Summer Time
> Krzysztof Kozlowski wrote:
>> On 08/08/2025 21:46, Duje Mihanović wrote:
>>> On Friday, 8 August 2025 09:34:54 Central European Summer Time Krzysztof
>>> Kozlowski wrote:
>>>> On Wed, Aug 06, 2025 at 07:33:21PM +0200, Duje Mihanović wrote:
>>>>> + A number of phandles to clocks that need to be enabled during
>>>>> domain + power up.
>>>>
>>>> This does not exist in your example, so it is just confusing.
>>>
>>> This is because I have not implemented any of the clocks used by the
>>> domains at this moment.
>>>
>>> Actually, I am not sure anymore whether it is necessary to assign
>>> clocks to the domains as I have just yesterday successfully brought up
>>> the GPU with some out-of-tree code and that did not require giving the
>>> domains any clocks even though the vendor kernel does this. Should I
>>> just go with that and drop all clock handling from the power domain
>>> driver, at which point there would be no need for the individual domain
>>> nodes? If not, how should I in the future assign clocks to the domains?
>>
>> I am asking to see complete binding with complete DTS in example and
>> submitted to SoC maintainer.
>
> Hm, so if in the example (and the actual DTS) each domain is assigned a clock,
> can I then keep the domain and domain controller nodes like Mediatek and
> Rockchip have?
You would need to point me to specific files or show some code.
>
> Does SoC maintainer here mean the SoC mailing list or the maintainer of the
> particular SoC family in question?
I meant rather post complete DTS to mailing lists (so maintainer of
given SoC family can see it as well), does not have to be the same patchset.
Best regards,
Krzysztof