Re: [PATCH v2 3/3] clk: thead: th1520-ap: set all AXI clocks to CLK_IS_CRITICAL

[Drew Fustini]

On Wed, Aug 13, 2025 at 03:27:02PM +0800, Icenowy Zheng wrote:
> The AXI crossbar of TH1520 has no proper timeout handling, which means
> gating AXI clocks can easily lead to bus timeout and thus system hang.
> 
> Set all AXI clock gates to CLK_IS_CRITICAL. All these clock gates are
> ungated by default on system reset.
> 
> In addition, convert all current CLK_IGNORE_UNUSED usage to
> CLK_IS_CRITICAL to prevent unwanted clock gating.
> 
> Signed-off-by: Icenowy Zheng <uwu@xxxxxxxxxx>
> ---
> No changes in v2 except for rebasing error fixes (which I sent as FIXED
> patches in v1).
> 
>  drivers/clk/thead/clk-th1520-ap.c | 44 +++++++++++++++----------------
>  1 file changed, 22 insertions(+), 22 deletions(-)

Reviewed-by: Drew Fustini <fustini@xxxxxxxxxx>