Re: [PATCH 2/3] x86/umip: Fix decoding of register forms of 0F 01 (SGDT and SIDT aliases)

From: Peter Zijlstra
Date: Thu Aug 14 2025 - 10:49:59 EST


On Fri, Aug 08, 2025 at 10:23:57AM -0700, Sean Christopherson wrote:
> Filter out the register forms of 0F 01 when determining whether or not to
> emulate in response to a potential UMIP violation #GP, as SGDT and SIDT
> only accept memory operands. The register variants of 0F 01 are used to
> encode instructions for things like VMX and SGX, i.e. not checking the Mod
> field would cause the kernel incorrectly emulate on #GP, e.g. due to a CPL
> violation on VMLAUNCH.
>
> Fixes: 1e5db223696a ("x86/umip: Add emulation code for UMIP instructions")
> Cc: stable@xxxxxxxxxxxxxxx
> Signed-off-by: Sean Christopherson <seanjc@xxxxxxxxxx>

Acked-by: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx>

> ---
> arch/x86/kernel/umip.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/arch/x86/kernel/umip.c b/arch/x86/kernel/umip.c
> index 406ac01ce16d..d432f3824f0c 100644
> --- a/arch/x86/kernel/umip.c
> +++ b/arch/x86/kernel/umip.c
> @@ -163,8 +163,19 @@ static int identify_insn(struct insn *insn)
> if (insn->opcode.bytes[1] == 0x1) {
> switch (X86_MODRM_REG(insn->modrm.value)) {
> case 0:
> + /* The reg form of 0F 01 /0 encodes VMX instructions. */
> + if (X86_MODRM_MOD(insn->modrm.value) == 3)
> + return -EINVAL;
> +
> return UMIP_INST_SGDT;
> case 1:
> + /*
> + * The reg form of 0F 01 /1 encodes MONITOR/MWAIT,
> + * STAC/CLAC, and ENCLS.
> + */
> + if (X86_MODRM_MOD(insn->modrm.value) == 3)
> + return -EINVAL;
> +
> return UMIP_INST_SIDT;
> case 4:
> return UMIP_INST_SMSW;
> --
> 2.50.1.703.g449372360f-goog
>