Re: [PATCH 1/3] spi: dt-bindings: add doc for Amlogic A113L2 SFC
From: Krzysztof Kozlowski
Date: Wed Aug 13 2025 - 12:28:44 EST
On 13/08/2025 11:34, Xianwei Zhao wrote:
> Hi Krzysztof,
> Thanks for your reply.
>
> On 2025/8/13 15:36, Krzysztof Kozlowski wrote:
>> [ EXTERNAL EMAIL ]
>>
>> On 13/08/2025 08:13, Xianwei Zhao wrote:
>>>>> +allOf:
>>>>> + - $ref: /schemas/spi/spi-controller.yaml#
>>>>> +
>>>>> +properties:
>>>>> + compatible:
>>>>> + const: amlogic,a4-spifc
>>>>> +
>>>>> + reg:
>>>>> + items:
>>>>> + - description: core registers
>>>>> + - description: parent clk control registers
>>>>
>>>> Why are you poking to parent node or to clock registers? This looks like
>>>> mixing up device address spaces.
>>>>
>>>
>>> The SPIFC bus clock multiplexes EMMC modules, so the corresponding
>>> frequency division register is also in EMMC module. The SPIFC and the
>>> EMMC modules cannot be used simultaneously.
>>
>> Then obviously you cannot put here EMMC or parent registers.
>>
>> It looks really like you miss proper hardware representation.
>>
>
> It does seem a bit unusual. However, in our hardware design, EMMC and
> SFC modules are integrated, and they share common resources such as the
> clock and I/O pins .They are mutually exclusive.
>
How did you express it in DT? This looks similar to serial engines and
such are not implemented independently.
> Here, I'll modify the register description. Do you think it's feasible
No, because it changes nothing... Clock provider pokes clock divider
registers. Not clock consumer.
Best regards,
Krzysztof