[PATCH v1] PCI: stm32: use pinctrl_pm_select_init_state() in stm32_pcie_resume_noirq()

[Christian Bruel]

Replace direct access to dev->pins->init_state with the new helper
pinctrl_pm_select_init_state() to select the init pinctrl state.
This fixes build issues when CONFIG_PINCTRL is not defined.

Depends-on: <20250813081139.93201-3-christian.bruel@xxxxxxxxxxx>
Reported-by: Bjorn Helgaas <bhelgaas@xxxxxxxxxx>
Reported-by: kernel test robot <lkp@xxxxxxxxx>
Closes: https://lore.kernel.org/oe-kbuild-all/202506260920.bmQ9hQ9s-lkp@xxxxxxxxx/
Fixes: 633f42f48af5 ("PCI: stm32: Add PCIe host support for STM32MP25")
Signed-off-by: Christian Bruel <christian.bruel@xxxxxxxxxxx>
---
Changes in v1:
 - pinctrl_pm_select_init_state() return 0 if the state is not defined.
   No need to test as pinctrl_pm_select_default_state() is called.
---
 drivers/pci/controller/dwc/pcie-stm32.c | 10 +++-------
 1 file changed, 3 insertions(+), 7 deletions(-)

diff --git a/drivers/pci/controller/dwc/pcie-stm32.c b/drivers/pci/controller/dwc/pcie-stm32.c
index 50fae5f5ced2..8501b9ed0633 100644
--- a/drivers/pci/controller/dwc/pcie-stm32.c
+++ b/drivers/pci/controller/dwc/pcie-stm32.c
@@ -90,14 +90,10 @@ static int stm32_pcie_resume_noirq(struct device *dev)
 
 	/*
 	 * The core clock is gated with CLKREQ# from the COMBOPHY REFCLK,
-	 * thus if no device is present, must force it low with an init pinmux
-	 * to be able to access the DBI registers.
+	 * thus if no device is present, must deassert it with a GPIO from
+	 * pinctrl pinmux before accessing the DBI registers.
 	 */
-	if (!IS_ERR(dev->pins->init_state))
-		ret = pinctrl_select_state(dev->pins->p, dev->pins->init_state);
-	else
-		ret = pinctrl_pm_select_default_state(dev);
-
+	ret = pinctrl_pm_select_init_state(dev);
 	if (ret) {
 		dev_err(dev, "Failed to activate pinctrl pm state: %d\n", ret);
 		return ret;
-- 
2.34.1