Re: [PATCH V2 1/4] dt-bindings: ufs: qcom: Document MCQ register space for UFS

[Ram Kumar Dwivedi]

On 11-Aug-25 8:32 PM, Bjorn Andersson wrote:
> On Mon, Aug 11, 2025 at 08:01:36PM +0530, Ram Kumar Dwivedi wrote:
>> Document Multi-Circular Queue (MCQ) register space for
>> Qualcomm UFS controllers.
>>
>> Signed-off-by: Ram Kumar Dwivedi <quic_rdwivedi@xxxxxxxxxxx>
>> ---
>>  .../devicetree/bindings/ufs/qcom,ufs.yaml        | 16 ++++++++++------
>>  1 file changed, 10 insertions(+), 6 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
>> index 6c6043d9809e..daf681b0e23b 100644
>> --- a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
>> +++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
>> @@ -89,9 +89,13 @@ properties:
>>      maxItems: 2
>>  
>>    reg-names:
>> -    items:
>> -      - const: std
>> -      - const: ice
>> +    oneOf:
>> +      - items:
>> +          - const: std
>> +          - const: ice
>> +      - items:
>> +          - const: ufs_mem
>> +          - const: mcq
> 
> So you can either "std" and "ice", or "ufs_mem" and "mcq".
> 
> Does this imply that "std" changes name to "ufs_mem"? Why?

Hi Bjorn,

The "std" is renamed to "ufs_mem" to more accurately represent the memory-mapped region associated with UFS controller.



> Is MCQ incompatible with ICE?


Yes, MCQ is compatible with ICE. 
Actually there are 3 possible cases:
- Case 1: Older Targets (e.g., SM8150)
  The UFS controller node includes both "std" and "ice" in the reg-name.

- Case 2: Recent Non-MCQ Targets(SM8550)  
  ICE is defined in a separate node, outside the UFS node, and the `reg-name` is not specified.

- Case 3: MCQ-Enabled Targets(SM8650,SM8750 - Part of Current Patch)  
  The reg-name includes both "ufs_mem" and "mcq" regions.

In summary, across all three scenarios, the configuration may include:
- "std" and "ice" together,
- "ufs_mem" and "mcq" together, or
- no reg-name defined at all.




> 
> 
> Please use the commit message to document why this is.

I will mention this in commit message of next patch set.


Thanks,
Ram.



> 
> Regards,
> Bjorn
> 
>>  
>>    required-opps:
>>      maxItems: 1
>> @@ -177,9 +181,9 @@ allOf:
>>              - const: rx_lane1_sync_clk
>>          reg:
>>            minItems: 1
>> -          maxItems: 1
>> +          maxItems: 2
>>          reg-names:
>> -          maxItems: 1
>> +          maxItems: 2
>>  
>>    - if:
>>        properties:
>> @@ -280,7 +284,7 @@ allOf:
>>      then:
>>        properties:
>>          reg:
>> -          maxItems: 1
>> +          maxItems: 2
>>          clocks:
>>            minItems: 7
>>            maxItems: 8
>> -- 
>> 2.50.1
>>