[PATCH V2 5/7] arm64: dts: ti: k3-j722s-main: Add interrupts property

From: Yemike Abhilash Chandra
Date: Fri Aug 08 2025 - 05:59:58 EST


Add interrupts property for CDNS CSI2RX. Interrupt IDs are taken from the
J722S TRM [0].

Interrupt Line | Source Interrupt
-------------------|-------------------------
GICSS0_SPI_IN_178 | CSI_RX_IF1_CSI_ERR_IRQ_0
GICSS0_SPI_IN_179 | CSI_RX_IF1_CSI_IRQ_0
GICSS0_SPI_IN_219 | CSI_RX_IF2_CSI_ERR_IRQ_0
GICSS0_SPI_IN_232 | CSI_RX_IF2_CSI_IRQ_0
GICSS0_SPI_IN_249 | CSI_RX_IF3_CSI_ERR_IRQ_0
GICSS0_SPI_IN_250 | CSI_RX_IF3_CSI_IRQ_0

[0]: https://www.ti.com/lit/zip/sprujb3

Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@xxxxxx>
Reviewed-by: Udit Kumar <u-kumar1@xxxxxx>
Reviewed-by: Jared McArthur <j-mcarthur@xxxxxx>
---
arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
index 5cfa7bf36641..6a8e5ff3b1d5 100644
--- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
@@ -168,6 +168,9 @@ ti_csi2rx1: ticsi2rx@30122000 {
cdns_csi2rx1: csi-bridge@30121000 {
compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
reg = <0x00 0x30121000 0x00 0x1000>;
+ interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error_irq", "irq";
clocks = <&k3_clks 247 0>, <&k3_clks 247 3>, <&k3_clks 247 0>,
<&k3_clks 247 0>, <&k3_clks 247 4>, <&k3_clks 247 4>;
clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
@@ -221,6 +224,9 @@ ti_csi2rx2: ticsi2rx@30142000 {
cdns_csi2rx2: csi-bridge@30141000 {
compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
reg = <0x00 0x30141000 0x00 0x1000>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error_irq", "irq";
clocks = <&k3_clks 248 0>, <&k3_clks 248 3>, <&k3_clks 248 0>,
<&k3_clks 248 0>, <&k3_clks 248 4>, <&k3_clks 248 4>;
clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
@@ -274,6 +280,9 @@ ti_csi2rx3: ticsi2rx@30162000 {
cdns_csi2rx3: csi-bridge@30161000 {
compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
reg = <0x00 0x30161000 0x00 0x1000>;
+ interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error_irq", "irq";
clocks = <&k3_clks 249 0>, <&k3_clks 249 3>, <&k3_clks 249 0>,
<&k3_clks 249 0>, <&k3_clks 249 4>, <&k3_clks 249 4>;
clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
--
2.34.1