Re: [RFC PATCH 25/36] arm_mpam: Register and enable IRQs

[James Morse]

Hi Shaoepeng,

On 17/07/2025 02:08, Shaopeng Tan (Fujitsu) wrote:
> > Register and enable error IRQs. All the MPAM error interrupts indicate a
> > software bug, e.g. out of range partid. If the error interrupt is ever signalled,
> > attempt to disable MPAM.
> >
> > Only the irq handler accesses the ESR register, so no locking is needed.
> > The work to disable MPAM after an error needs to happen at process context,
> > use a threaded interrupt.
> >
> > There is no support for percpu threaded interrupts, for now schedule the work
> > to be done from the irq handler.
> >
> > Enabling the IRQs in the MSC may involve cross calling to a CPU that can
> > access the MSC.

> > diff --git a/drivers/platform/arm64/mpam/mpam_devices.c
> > b/drivers/platform/arm64/mpam/mpam_devices.c
> > index 145535cd4732..af19cc25d16e 100644
> > --- a/drivers/platform/arm64/mpam/mpam_devices.c
> > +++ b/drivers/platform/arm64/mpam/mpam_devices.c

> > +static irqreturn_t __mpam_irq_handler(int irq, struct mpam_msc *msc) {
> > +	u64 reg;
> > +	u16 partid;
> > +	u8 errcode, pmg, ris;
> > +
> > +	if (WARN_ON_ONCE(!msc) ||
> > +	    WARN_ON_ONCE(!cpumask_test_cpu(smp_processor_id(),
> > +					   &msc->accessibility)))
> > +		return IRQ_NONE;
> > +
> > +	reg = mpam_msc_read_esr(msc);
> > +
> > +	errcode = FIELD_GET(MPAMF_ESR_ERRCODE, reg);
> > +	if (!errcode)
> > +		return IRQ_NONE;

> In general, I think there is no problem. 
> However, the initial value of MPAMF_ESR_ERRCODE may not be 0 on some chips. 
> It is better to initialize when loading the MPAM driver

Hmm, the architecture doesn't say - but if this weren't true, you get spurious fatal errors.
More interesting is if the bootloader (unlikey) or pervious kexec kernel (feasible) were using
MPAM and triggered an error. We'd ned up disabling the driver when there was no bug...

I'll add something to the hw_probe() path.


Thanks,

James