Re: [PATCH v2 3/8] media: platform: amd: Add helpers to configure isp4 mipi phy
From: Du, Bin
Date: Thu Jul 31 2025 - 05:32:29 EST
Many thanks Sakari Ailus for your review
On 7/28/2025 3:28 PM, Sakari Ailus wrote:
Hi Bin,
On Wed, Jun 18, 2025 at 05:19:54PM +0800, Bin Du wrote:
+struct isp4phy_mipi_reg_seq {
+ u16 addr;
+ u16 mask;
+ u16 data;
+};
+
[snip]
+struct isp4phy_mipi_reg {
+ union isp4phy_mipi_0 isp_mipi_phy0;
+ union isp4phy_mipi_1 isp_mipi_phy1;
+ union isp4phy_mipi_2 isp_mipi_phy2;
+ struct isp4phy_mipi_3 isp_mipi_phy3;
+ union isp4phy_mipi_4 isp_mipi_phy4;
+ union isp4phy_mipi_5 isp_mipi_phy5;
+ union isp4phy_mipi_6 isp_mipi_phy6;
+ union isp4phy_mipi_7 isp_mipi_phy7;
+ u32 reserve;
+ union isp4phy_mipi_ind_idx isp_mipi_phy_ind_idx;
+ union isp4phy_mipi_ind_data isp_mipi_phy_ind_data;
+ union isp4phy_mipi_ind_wack isp_mipi_phy_inc_wack;
+};
One more thing. Is there an endianness issue here?
Overall the CPU endianness may be big or little while the device endianness
is little, presumably. You should use __le* types and functions to convert
the endianness when dealing with the messages to and from the device.
Good consideration, no endianness issue here because AMD APU is little
endian x64 arch which aligns with the device endianness, so, no extra
conversion is needed
Regards,
Bin