Re: [PATCH 0/6] gpio: renesas: Add support for GPIO and related interrupts in RZ/N1 SoC

From: Wolfram Sang
Date: Sun Jul 27 2025 - 07:02:02 EST


Hi Hervé,

> This series adds support for GPIO and GPIO IRQ mux available in the
> RZ/N1 SoCs.

Yes, way cool! Very happy to see this upstreaming effort!

> The first two patches of the series add support for GPIO (binding update
> and device-tree description).

So, I started simple and used the first two patches to enable LEDs on
pins 92 and 93 on my board. I added this on top of patch 1+2:

diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
index 3258b2e27434..4790ffad578f 100644
--- a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
+++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
@@ -185,6 +185,12 @@ fixed-link {
};
};

+&gpio1 {
+ pinctrl-0 = <&pins_gpio1>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
&i2c2 {
pinctrl-0 = <&pins_i2c2>;
pinctrl-names = "default";
@@ -256,6 +262,11 @@ pins_cpld: pins-cpld {
<RZN1_PINMUX(122, RZN1_FUNC_USB)>;
};

+ pins_gpio1: pins-gpio1 {
+ pinmux = <RZN1_PINMUX(92, RZN1_FUNC_GPIO)>, /* GPIO1B[23] */
+ <RZN1_PINMUX(93, RZN1_FUNC_GPIO)>; /* GPIO1B[24] */
+ };
+
pins_eth3: pins_eth3 {
pinmux = <RZN1_PINMUX(36, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(37, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>

to my board dts. The controller gets probed but I can't control the
LEDs. Neither with exported GPIOs (via sysfs) nor with a dedicated LED
node. Am I missing something obvious? The LEDs are attached to PL_GPIO92
and PL_GPIO93 which are mapped to GPIO1b[23] and GPIO1b[24]. That seems
to be in accordance with the datasheet. I hope I just overlooked
something simple. Some outputs, first /sys/kernel/debug/gpio:

...
gpiochip1: GPIOs 552-583, parent: platform/5000c000.gpio, 5000c000.gpio:

gpiochip2: GPIOs 584-615, parent: platform/5000c000.gpio, 5000c000.gpio:
gpio-608 ( |sysfs ) out hi

And /sys/kernel/debug/pinctrl/40067000.pinctrl/pinmux-pins:

Pinmux settings per pin
Format: pin (name): mux_owner gpio_owner hog?
...
pin 92 (pl_gpio92): 5000c000.gpio (GPIO UNCLAIMED) function pins-gpio1 group pins-gpio1
pin 93 (pl_gpio93): 5000c000.gpio (GPIO UNCLAIMED) function pins-gpio1 group pins-gpio1

I wonder about the "(GPIO UNCLAIMED)" a little? How do you use it on
your board?

Thanks and happy hacking,

Wolfram

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