Re: [RESEND PATCH v3] x86: Clear feature bits disabled at compile-time

[Maciej Wieczor-Retman]

On 2025-07-24 at 13:34:44 +0200, Greg KH wrote:
>Your reply-to is messed up :(
>
>On Thu, Jul 24, 2025 at 12:45:35PM +0200, Maciej Wieczor-Retman wrote:
>> If some config options are disabled during compile time, they still are
>> enumerated in macros that use the x86_capability bitmask - cpu_has() or
>> this_cpu_has().
>> 
>> The features are also visible in /proc/cpuinfo even though they are not
>> enabled - which is contrary to what the documentation states about the
>> file. Examples of such feature flags are lam, fred, sgx, ibrs_enhanced,
>> split_lock_detect, user_shstk, avx_vnni and enqcmd.
>> 
>> Add a DISABLED_MASK_INITIALIZER macro that creates an initializer list
>> filled with DISABLED_MASKx bitmasks.
>> 
>> Initialize the cpu_caps_cleared array with the autogenerated disabled
>> bitmask.
>> 
>> Fixes: ea4e3bef4c94 ("Documentation/x86: Add documentation for /proc/cpuinfo feature flags")
>> Reported-by: Farrah Chen <farrah.chen@xxxxxxxxx>
>> Signed-off-by: H. Peter Anvin (Intel) <hpa@xxxxxxxxx>
>> Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@xxxxxxxxx>
>> Cc: <stable@xxxxxxxxxxxxxxx>
>> ---
>> Resend:
>> - Fix macro name to match with the patch message.
>
>That's a v4, not a RESEND.
>
>Doesn't Intel have a "Here is how to submit a patch to the kernel"
>training program you have to go through?
>
>confused,
>
>greg k-h

The way I did it used to work for me previously, I'm not sure why it didn't this
time.

-- 
Kind regards
Maciej Wieczór-Retman