[GIT PULL] timer drivers for v6.17-rc1

From: Daniel Lezcano
Date: Tue Jul 22 2025 - 15:14:42 EST


The following changes since commit d7b8f8e20813f0179d8ef519541a3527e7661d3a:

Linux 6.16-rc5 (2025-07-06 14:10:26 -0700)

are available in the Git repository at:

ssh://git@xxxxxxxxxxxxxxxxxxx/pub/scm/linux/kernel/git/daniel.lezcano/linux tags/timers-v6.17-rc1

for you to fetch changes up to 7e477e9c4eb412cbcaeae3ed4fff22035dc943eb:

clocksource/drivers/exynos_mct: Fix section mismatch from the module conversion (2025-07-15 19:46:23 +0200)

----------------------------------------------------------------
- Add the module owner to all the drivers which can be converted into
modules in order to have the core time framework to take the
refcount and prevent wild module removal. In addition export the
symbols for the sched_clock_register() function to allow the drivers
to be converted into modules (Daniel Lezcano)

- Convert the faraday,fttmr010 DT bindings to yaml schema (Rob
Herring)

- Add the DT bindings compatible string for the MT6572 (Max
Shevchenko)

- Fix the fsl,ftm-timer bindings by using the items to describe a
register (Frank Li)
Chen Ni <nichen@xxxxxxxxxxx>
- Add the DT binding documentation for Andes machine timer (Ben
Zong-You Xie)

- Fix the exynos mct driver to allow the module support. The changes
include fixing the empty IRQ name, changing to percpu interrupts and
preventing to use the clocksource as a sched clock source on ARM64
(Will McVicker)

- Avoid 64-bit divide operation which fails on xtensa and simplify the
timeleft computation with 32 bits operations on Tegra186 (Guenter
Roeck)

- Add the fsl,timrot.yaml DT bindings for i.MX23/i.MX28 timer (Frank
Li)

- Replace comma by semicolon which were introduced when moving the
static structure initialization (Chen Ni)

- Add a new compatible for the MediaTek MT8196 SoC, fully compatible
with MT6765 (AngeloGioacchino Del Regno)

- Fix section mismatch from the module Exynos MCT conversion (Daniel
Lezcano)

----------------------------------------------------------------
AngeloGioacchino Del Regno (1):
dt-bindings: timer: mediatek,timer: Add MediaTek MT8196 compatible

Arnd Bergmann (1):
clocksource/drivers/tegra186: Avoid 64-bit division

Ben Zong-You Xie (1):
dt-bindings: timer: add Andes machine timer

Chen Ni (1):
clocksource/timer-econet-en751221: Convert comma to semicolon

Daniel Lezcano (8):
clocksource/drivers/scx200: Add module owner
clocksource/drivers/stm32-lp: Add module owner
clocksource/drivers/sun5i: Add module owner
clocksource/drivers/tegra186: Add module owner
clocksource/drivers/stm: Add module owner
clocksource/drivers/cs5535: Add module owner
time/sched_clock: Export symbol for sched_clock register function
clocksource/drivers/exynos_mct: Fix section mismatch from the module conversion

Donghoon Yu (1):
clocksource/drivers/exynos_mct: Add module support

Frank Li (2):
dt-bindings: timer: fsl,ftm-timer: use items for reg
dt-bindings: timer: Add fsl,timrot.yaml

Guenter Roeck (2):
clocksource/drivers/timer-tegra186: Avoid 64-bit divide operation
clocksource/drivers/timer-tegra186: Simplify calculating timeleft

Hosung Kim (1):
clocksource/drivers/exynos_mct: Set local timer interrupts as percpu

Max Shevchenko (1):
dt-bindings: timer: mediatek: add MT6572

Rob Herring (Arm) (1):
dt-bindings: timer: Convert faraday,fttmr010 to DT schema

Will McVicker (4):
of/irq: Export of_irq_count for modules
clocksource/drivers/exynos_mct: Don't register as a sched_clock on arm64
clocksource/drivers/exynos_mct: Fix uninitialized irq name warning
arm64: exynos: Drop select CLKSRC_EXYNOS_MCT

Documentation/devicetree/bindings/timer/andestech,plmt0.yaml | 53 +++++++++++++++++++++++++++++++++++++++++++++++++++++
Documentation/devicetree/bindings/timer/faraday,fttmr010.txt | 38 --------------------------------------
Documentation/devicetree/bindings/timer/faraday,fttmr010.yaml | 89 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Documentation/devicetree/bindings/timer/fsl,ftm-timer.yaml | 7 +++++--
Documentation/devicetree/bindings/timer/fsl,timrot.yaml | 48 ++++++++++++++++++++++++++++++++++++++++++++++++
Documentation/devicetree/bindings/timer/mediatek,timer.yaml | 2 ++
arch/arm64/Kconfig.platforms | 1 -
drivers/clocksource/Kconfig | 3 ++-
drivers/clocksource/exynos_mct.c | 75 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++--------------
drivers/clocksource/scx200_hrt.c | 1 +
drivers/clocksource/timer-cs5535.c | 1 +
drivers/clocksource/timer-econet-en751221.c | 2 +-
drivers/clocksource/timer-nxp-stm.c | 2 ++
drivers/clocksource/timer-stm32-lp.c | 1 +
drivers/clocksource/timer-sun5i.c | 2 ++
drivers/clocksource/timer-tegra186.c | 30 +++++++++++++++++++-----------
drivers/of/irq.c | 1 +
kernel/time/sched_clock.c | 4 ++--
18 files changed, 290 insertions(+), 70 deletions(-)
create mode 100644 Documentation/devicetree/bindings/timer/andestech,plmt0.yaml
delete mode 100644 Documentation/devicetree/bindings/timer/faraday,fttmr010.txt
create mode 100644 Documentation/devicetree/bindings/timer/faraday,fttmr010.yaml
create mode 100644 Documentation/devicetree/bindings/timer/fsl,timrot.yaml


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