Re: [RFC PATCH v8 33/35] x86/apic: Enable Secure AVIC in Control MSR

[Tianyu Lan]

On Wed, Jul 9, 2025 at 11:45 AM Neeraj Upadhyay <Neeraj.Upadhyay@xxxxxxx> wrote:
>
> With all the pieces in place now, enable Secure AVIC in Secure
> AVIC Control MSR. Any access to x2APIC MSRs are emulated by
> the hypervisor before Secure AVIC is enabled in the control MSR.
> Post Secure AVIC enablement, all x2APIC MSR accesses (whether
> accelerated by AVIC hardware or trapped as VC exception) operate
> on vCPU's APIC backing page.
>
> Signed-off-by: Neeraj Upadhyay <Neeraj.Upadhyay@xxxxxxx>
> ---
> Changes since v7:
>  - No change.

Reviewed-by: Tianyu Lan <tiala@xxxxxxxxxxxxx>

-- 
Thanks
Tianyu Lan

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