Re: [RFC PATCH v8 24/35] x86/apic: Add support to send IPI for Secure AVIC

[Tianyu Lan]

On Wed, Jul 9, 2025 at 11:42 AM Neeraj Upadhyay <Neeraj.Upadhyay@xxxxxxx> wrote:
>
> With Secure AVIC only Self-IPI is accelerated. To handle all the
> other IPIs, add new callbacks for sending IPI. These callbacks write
> to the IRR of the target guest vCPU's APIC backing page and issue
> GHCB protocol MSR write event for the hypervisor to notify the
> target vCPU about the new interrupt request.
>
> For Secure AVIC GHCB APIC MSR writes, reuse GHCB msr handling code in
> vc_handle_msr() by exposing a sev-internal sev_es_ghcb_handle_msr().
>
> Co-developed-by: Kishon Vijay Abraham I <kvijayab@xxxxxxx>
> Signed-off-by: Kishon Vijay Abraham I <kvijayab@xxxxxxx>
> Signed-off-by: Neeraj Upadhyay <Neeraj.Upadhyay@xxxxxxx>
> ---
> Changes since v7:
>  - No change.

Reviewed-by: Tianyu Lan <tiala@xxxxxxxxxxxxx>
-- 
Thanks
Tianyu Lan