Re: [PATCH 1/2] x86/build: only align ENTRY_TEXT to PMD_SIZE if necessary

From: Nikolay Borisov
Date: Thu Jul 17 2025 - 04:33:17 EST




On 10.07.25 г. 16:14 ч., Dave Hansen wrote:
On 7/9/25 13:16, Hamza Mahfooz wrote:
PTI requires the begin and end of ENTRY_TEXT be aligned to PMD_SIZE.
SRSO requires srso_alias_untrain_ret to be 2M aligned. This costs
between 2-4 MiB of RAM (depending on the size of the preceding section).
So, only align when PTI is enabled or SRSO is enabled.

This seems so utterly random.

I don't think I was even aware of the SRSO restriction here. Looking
over it now, I do see the vmlinux.lds.S changes and this does make sense.

But I'm really worried that we've grown more dependencies on this
alignment. Let's say, for instance, that you forgot to address SRSO in
this patch and the mitigation got broken. Would we have ever known?

Yes, because there are some ASSERT in the linker file that ensure the various SRSO thunks have appropriate alignment.


I'd like to hear a lot more from you about why 2-4 MiB of RAM is
important and what the environment is where you presumably know that
there are no Meltdown or SRSO vulnerable CPUs.