[PATCH v4 2/2] arm64: dts: qcom: sm8750: Add BWMONs

From: Konrad Dybcio
Date: Wed Jul 16 2025 - 08:26:59 EST


From: Shivnandan Kumar <quic_kshivnan@xxxxxxxxxxx>

Add the CPU BWMONs for SM8750 SoCs.

Notably, the one related to cluster0 requires that it's mapped with
the nE memory attribute. This is specific to a single instance, on this
platform only and should not be mimicked elsewhere.

Signed-off-by: Shivnandan Kumar <quic_kshivnan@xxxxxxxxxxx>
[konrad: add nonposted-mmio where necessary, re-sort nodes]
Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sm8750.dtsi | 76 ++++++++++++++++++++++++++++++++++++
1 file changed, 76 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi
index 4643705021c6ca095a16d8d7cc3adac920b21e82..79ca262f58115ccc4b0bd91d4efa75715e2b7397 100644
--- a/arch/arm64/boot/dts/qcom/sm8750.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi
@@ -3617,6 +3617,82 @@ frame@1680d000 {
};
};

+ /* cluster0 */
+ pmu@240b3400 {
+ compatible = "qcom,sm8750-cpu-bwmon", "qcom,sdm845-bwmon";
+ reg = <0x0 0x240b3400 0x0 0x600>;
+
+ interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
+
+ interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>;
+
+ operating-points-v2 = <&cpu_bwmon_opp_table>;
+
+ nonposted-mmio;
+
+ cpu_bwmon_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-0 {
+ opp-peak-kBps = <800000>;
+ };
+
+ opp-1 {
+ opp-peak-kBps = <2188000>;
+ };
+
+ opp-2 {
+ opp-peak-kBps = <5414400>;
+ };
+
+ opp-3 {
+ opp-peak-kBps = <6220800>;
+ };
+
+ opp-4 {
+ opp-peak-kBps = <6835200>;
+ };
+
+ opp-5 {
+ opp-peak-kBps = <8371200>;
+ };
+
+ opp-6 {
+ opp-peak-kBps = <10944000>;
+ };
+
+ opp-7 {
+ opp-peak-kBps = <12748800>;
+ };
+
+ opp-8 {
+ opp-peak-kBps = <14745600>;
+ };
+
+ opp-9 {
+ opp-peak-kBps = <16896000>;
+ };
+
+ opp-10 {
+ opp-peak-kBps = <19046400>;
+ };
+ };
+ };
+
+ /* cluster1 */
+ pmu@240b7400 {
+ compatible = "qcom,sm8750-cpu-bwmon", "qcom,sdm845-bwmon";
+ reg = <0x0 0x240b7400 0x0 0x600>;
+
+ interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
+
+ interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>;
+
+ operating-points-v2 = <&cpu_bwmon_opp_table>;
+ };
+
gem_noc: interconnect@24100000 {
compatible = "qcom,sm8750-gem-noc";
reg = <0x0 0x24100000 0x0 0x14b080>;

--
2.50.1