Re: [PATCH 3/6] arm64: dts: renesas: r9a09g077: Add SDHI nodes

From: Geert Uytterhoeven
Date: Mon Jul 07 2025 - 05:48:23 EST


Hi Prabhakar,

On Fri, 4 Jul 2025 at 19:13, Lad, Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote:
> On Fri, Jul 4, 2025 at 12:52 AM Lad, Prabhakar
> <prabhakar.csengg@xxxxxxxxx> wrote:
> > On Thu, Jul 3, 2025 at 10:56 AM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote:
> > > On Wed, 25 Jun 2025 at 17:31, Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote:
> > > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> > > >
> > > > Add SDHI0-SDHI1 nodes to RZ/T2H ("R9A09G077") SoC DTSI.
> > > >
> > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> > >
> > > Thanks for your patch!
> > >
> > > > --- a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi
> > > > +++ b/arch/arm64/boot/dts/renesas/r9a09g077.dtsi
> > > > @@ -155,6 +155,46 @@ gic: interrupt-controller@83000000 {
> > > > interrupt-controller;
> > > > interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
> > > > };
> > > > +
> > > > + sdhi0: mmc@92080000 {
> > > > + compatible = "renesas,sdhi-r9a09g077",
> > > > + "renesas,sdhi-r9a09g057";
> > > > + reg = <0x0 0x92080000 0 0x10000>;
> > > > + interrupts = <GIC_SPI 782 IRQ_TYPE_LEVEL_HIGH>,
> > > > + <GIC_SPI 783 IRQ_TYPE_LEVEL_HIGH>;
> > > > + clocks = <&cpg CPG_MOD 1212>,
> > >
> > > 1112?
> > >
> > Agreed (and below).
> >
> Sorry, it is indeed 1212/1213 as the bits belong to MSTPCRM register.

Oops, you're right. Sorry for the noise.

Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds