Re: [tip: x86/urgent] x86/traps: Initialize DR7 by writing its architectural reset value
From: Borislav Petkov
Date: Thu Jun 26 2025 - 05:06:07 EST
On Tue, Jun 24, 2025 at 08:35:22PM -0000, tip-bot2 for Xin Li (Intel) wrote:
> The following commit has been merged into the x86/urgent branch of tip:
>
> Commit-ID: fa7d0f83c5c4223a01598876352473cb3d3bd4d7
> Gitweb: https://git.kernel.org/tip/fa7d0f83c5c4223a01598876352473cb3d3bd4d7
> Author: Xin Li (Intel) <xin@xxxxxxxxx>
> AuthorDate: Fri, 20 Jun 2025 16:15:04 -07:00
> Committer: Dave Hansen <dave.hansen@xxxxxxxxxxxxxxx>
> CommitterDate: Tue, 24 Jun 2025 13:15:52 -07:00
>
> x86/traps: Initialize DR7 by writing its architectural reset value
>
> Initialize DR7 by writing its architectural reset value to always set
> bit 10, which is reserved to '1', when "clearing" DR7 so as not to
> trigger unanticipated behavior if said bit is ever unreserved, e.g. as
> a feature enabling flag with inverted polarity.
OMG, who wrote that "text"?
I asked AI to simplify it:
"Set DR7 to its standard reset value and always make sure bit 10 is set to 1.
This prevents unexpected issues if bit 10 later becomes a feature flag that is
active when cleared."
It sure does read better and I can understand what you're trying to say.
So can we *please* use simple, declarative sentences in our commit messages
and not perpetuate the SDM?
Thx.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette