Hi Alex,
On 21:44 Sat 14 Jun , Alex Elder wrote:
On 6/12/25 8:11 PM, Alex Elder wrote:sure, done, check here (let me know if I did wrong)
Implement reset support for SpacemiT CCUs. A SpacemiT reset controller
device is an auxiliary device associated with a clock controller (CCU).
This patch defines the reset controllers for the MPMU, APBC, and MPMU
CCUs, which already define clock controllers. It also adds RCPU, RCPU2,
and ACPB2 CCUs, which only define resets.
Signed-off-by: Alex Elder <elder@xxxxxxxxxxxx>
Reviewed-by: Philipp Zabel <p.zabel@xxxxxxxxxxxxxx>
Reviewed-by: Yixun Lan <dlan@xxxxxxxxxx>
---
v11: Redefined combined reset definitions into individual ones
After I sent this, I realized the clocks use a different
naming convention for two of the PCIe symbols. I think
reset should follow the same convention.
Yixun if you accept this series, would you mind updating
these?
RESET_PCIE0_SLV -> RESET_PCIE0_SLAVE
RESET_PCIE0_MSTR -> RESET_PCIE_MASTER
(And similar changes for PCIE1 and PCIE2.)
https://github.com/spacemit-com/linux/releases/tag/spacemit-reset-drv-for-6.17
Thank you.
-Alex