Re: [PATCH v2 2/2] x86/traps: Initialize DR7 by writing its architectural reset value

[H. Peter Anvin]

On June 17, 2025 5:15:18 PM PDT, Xin Li <xin@xxxxxxxxx> wrote:
>On 6/17/2025 4:08 PM, Xin Li wrote:
>> 
>> I hope the bit will be kept reserved to 1 *forever*, because inverted
>> polarity seems causing confusing and complicated code only.
>
>BTW, FRED flipped BLD and RTM polarities in its event data:
>
>The event data is not exactly the same as that which will be in DR6
>following delivery of the #DB. The polarity of bit 11 (BLD) and bit 16
>(RTM) is inverted in DR6.
>
>
>I.e., BLD and RTM are active high in FRED event data.

Yes, we designed it so FRED (and VTx) are always active high