[PATCH v2 0/2] Add SMMU-V3-PMCG and L2/L3 cache nodes in Agilex5 DTSI

[adrianhoyin . ng]

From: Adrian Ng Ho Yin <adrianhoyin.ng@xxxxxxxxxx>

This patchset include the following changes:
-Add SMMU-V3-PMCG node for Agilex5
-Add L2 and L3 cache node for Agilex5

v2:
-Move MMIO nodes into soc@0

Adrian Ng Ho Yin (2):
  arm64: dts: socfpga: agilex5: Add SMMU-V3-PMCG nodes
  arm64: dts: socfpga: agilex5: Add L2 and L3 cache

 .../arm64/boot/dts/intel/socfpga_agilex5.dtsi | 80 +++++++++++++++++++
 1 file changed, 80 insertions(+)

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2.49.GIT