[RFC Patch v2 0/4] x86/Hyper-V: Add AMD Secure AVIC for Hyper-V platform

[Tianyu Lan]

From: Tianyu Lan <tiala@xxxxxxxxxxxxx>

Secure AVIC is a new hardware feature in the AMD64
architecture to allow SEV-SNP guests to prevent the
hypervisor from generating unexpected interrupts to
a vCPU or otherwise violate architectural assumptions
around APIC behavior.

Each vCPU has a guest-allocated APIC backing page of
size 4K, which maintains APIC state for that vCPU.
APIC backing page's ALLOWED_IRR field indicates the
interrupt vectors which the guest allows the hypervisor
to send.

This patchset is to enable the feature for Hyper-V
platform. Patch "Expose x2apic_savic_update_vector()"
is to expose new fucntion and device driver and arch
code may update AVIC backing page ALLOWED_IRR field to
allow Hyper-V inject associated vector.

This patchset is based on the AMD patchset "AMD: Add
Secure AVIC Guest Support"
https://lkml.org/lkml/2025/6/10/1579

Change since v1:
       - Remove the check of Secure AVIC when set APIC backing page
       - Use apic_update_vector() instead of exposing new interface
       from Secure AVIC driver to update APIC backing page and allow
       associated interrupt to be injected by hypervisor.

Tianyu Lan (4):
  x86/Hyper-V: Not use hv apic driver when Secure AVIC is available
  drivers/hv: Allow vmbus message synic interrupt injected from Hyper-V
  x86/Hyper-V: Not use auto-eoi when Secure AVIC is available
  x86/Hyper-V: Allow Hyper-V to inject Hyper-V vectors

 arch/x86/hyperv/hv_apic.c      | 3 +++
 arch/x86/hyperv/hv_init.c      | 4 ++++
 arch/x86/kernel/cpu/mshyperv.c | 2 ++
 drivers/hv/hv.c                | 2 ++
 4 files changed, 11 insertions(+)

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2.25.1