Re: [PATCH 2/2] RISC-V: make use of variadic sbi_ecall
From: David Laight
Date: Fri Jun 13 2025 - 06:55:28 EST
On Thu, 12 Jun 2025 16:57:55 +0200
Radim Krčmář <rkrcmar@xxxxxxxxxxxxxxxx> wrote:
> The new sbi_ecall doesn't have to list all 8 arguments anymore, so only
> pass the actual numbers of arguments for each SBI function.
>
> Trailing 0 is sometimes intentional.
...
> @@ -630,10 +630,10 @@ static int pmu_sbi_snapshot_setup(struct riscv_pmu *pmu, int cpu)
> if (IS_ENABLED(CONFIG_32BIT))
> ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_SNAPSHOT_SET_SHMEM,
> cpu_hw_evt->snapshot_addr_phys,
> - (u64)(cpu_hw_evt->snapshot_addr_phys) >> 32, 0, 0, 0, 0);
> + (u64)(cpu_hw_evt->snapshot_addr_phys) >> 32);
That doesn't look right (and other similar ones).
The values are still 64bit - so get passed as two 32bit values (in some way)
so that varargs code will get the wrong values.
I guess the previous change wasn't tested on 32bit?
David