Re: [PATCH v1 0/3] x86/traps: Fix DR6/DR7 inintialization

From: Xin Li
Date: Fri Jun 13 2025 - 03:50:31 EST


On 6/13/2025 12:18 AM, Peter Zijlstra wrote:
On Fri, Jun 13, 2025 at 12:01:14AM -0700, Xin Li (Intel) wrote:

Since only BLD-induced #DB exceptions clear DR6.BLD and other debug
exceptions leave it unchanged, even if the first #DB is unrelated to
BLD, DR6.BLD is still cleared. As a result, such a first #DB is
misinterpreted as a BLD #DB, and a false warning is triggerred.


Fix the bug by initializing DR6 by writing its architectural reset
value at boot time.


DR7 suffers from a similar issue. We apply the same fix.

Bah, this DR6 polarity is a pain in the behind for sure. Patches look
good, except I'm really not a fan of using those 'names'. But I'll not
object too much of others like it.

Let's see if there will be more objections :)