Re: [PATCH v1 2/3] x86/traps: Initialize DR7 by writing its architectural reset value

[Peter Zijlstra]

On Fri, Jun 13, 2025 at 12:01:16AM -0700, Xin Li (Intel) wrote:

> While at it, replace the hardcoded debug register number 7 with the
> existing DR_CONTROL macro for clarity.

Yeah, not really a fan of that... IMO that obfuscates the code more than
it helps, consider:

> -	get_debugreg(dr7, 7);
> +	get_debugreg(dr7, DR_CONTROL);

and:

> -	for (i = 0; i < 8; i++) {
> -		/* Ignore db4, db5 */
> -		if ((i == 4) || (i == 5))
> -			continue;
> +	/* Control register first */
> +	set_debugreg(DR7_RESET_VALUE, DR_CONTROL);
> +	set_debugreg(0, DR_STATUS);
>  
> +	/* Ignore db4, db5 */
> +	for (i = DR_FIRSTADDR; i <= DR_LASTADDR; i++)

I had to git-grep DR_{FIRST,LAST}ADDR to double check this was correct :(

Also, you now write them in the order:

  dr7, dr6, /* dr4, dr5 */, dr0, dr1, dr2, dr3

My OCD disagrees with this :-)