[PATCH v3 31/44] x86/cacheinfo: Use parsed CPUID(0x2)
From: Ahmed S. Darwish
Date: Thu Jun 12 2025 - 19:45:54 EST
Use parsed CPUID(0x2) access instead of direct CPUID queries.
Remove the max standard CPUID level check since the NULL check of
cpuid_leaf_regs()'s result is equivalent.
Signed-off-by: Ahmed S. Darwish <darwi@xxxxxxxxxxxxx>
---
arch/x86/kernel/cpu/cacheinfo.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/x86/kernel/cpu/cacheinfo.c b/arch/x86/kernel/cpu/cacheinfo.c
index adfa7e8bb865..39cd6db4f702 100644
--- a/arch/x86/kernel/cpu/cacheinfo.c
+++ b/arch/x86/kernel/cpu/cacheinfo.c
@@ -382,14 +382,14 @@ static void intel_cacheinfo_0x2(struct cpuinfo_x86 *c)
{
unsigned int l1i = 0, l1d = 0, l2 = 0, l3 = 0;
const struct leaf_0x2_table *desc;
- union leaf_0x2_regs regs;
+ struct cpuid_regs *regs;
u8 *ptr;
- if (c->cpuid_level < 2)
+ regs = cpuid_leaf_regs(c, 0x2);
+ if (!regs)
return;
- cpuid_leaf_0x2(®s);
- for_each_cpuid_0x2_desc(regs, ptr, desc) {
+ for_each_parsed_cpuid_0x2_desc(regs, ptr, desc) {
switch (desc->c_type) {
case CACHE_L1_INST: l1i += desc->c_size; break;
case CACHE_L1_DATA: l1d += desc->c_size; break;
--
2.49.0