Re: [PATCH v3 1/2] phy: cadence-torrent: Add PCIe multilink configuration for 100 MHz refclk
From: Enric Balletbo i Serra
Date: Thu Jun 12 2025 - 04:49:28 EST
Hi all,
On Thu, Jan 9, 2025 at 5:35 PM Roger Quadros <rogerq@xxxxxxxxxx> wrote:
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>
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> On 09/01/2025 14:16, Siddharth Vadapalli wrote:
> > From: Swapnil Jakhade <sjakhade@xxxxxxxxxxx>
> >
> > Add register sequences to support PCIe multilink configuration for 100MHz
> > reference clock. Maximum two PCIe links are supported.
> >
> > Signed-off-by: Swapnil Jakhade <sjakhade@xxxxxxxxxxx>
> > Signed-off-by: Siddharth Vadapalli <s-vadapalli@xxxxxx>
>
> Reviewed-by: Roger Quadros <rogerq@xxxxxxxxxx>
>
These patches seem good and have been reviewed but look stalled here.
There is any chance to rebase it on top of the mainline?
Thanks,
Enric