Re: [PATCH] clk: sunxi-ng: a523: Mark MBUS clock as critical

[Andre Przywara]

Hi Chen-Yu,

thanks for your research on this!

On 07/06/2025 14:50, Chen-Yu Tsai wrote:
> From: Chen-Yu Tsai <wens@xxxxxxxx>
>
> The MBUS serves as the main data bus for various DMA masters in the
> system. If its clock is not enabled, the DMA operations will stall,
> leading to the peripherals stalling or timing out. This has been
> observed as USB or MMC hosts timing out waiting for transactions
> when the clock is automatically disabled by the CCF due to it not
> being used.
>
> Mark the clock as critical so that it never gets disabled.

Yes, we do this for all the other SoCs, and I somehow missed that for 
the A523.
I am still scratching my head how this worked for me, though, but the 
patch is pretty surely correct:

> Fixes: 74b0443a0d0a ("clk: sunxi-ng: a523: add system mod clocks")
> Signed-off-by: Chen-Yu Tsai <wens@xxxxxxxx>

Reviewed-by: Andre Przywara <andre.przywara@xxxxxxx>

Cheers,
Andre

> ---
>   drivers/clk/sunxi-ng/ccu-sun55i-a523.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clk/sunxi-ng/ccu-sun55i-a523.c b/drivers/clk/sunxi-ng/ccu-sun55i-a523.c
> index 9efb9fd24b42..1a9a1cb869e2 100644
> --- a/drivers/clk/sunxi-ng/ccu-sun55i-a523.c
> +++ b/drivers/clk/sunxi-ng/ccu-sun55i-a523.c
> @@ -385,7 +385,8 @@ static SUNXI_CCU_MP_DATA_WITH_MUX_GATE_FEAT(mbus_clk, "mbus", mbus_parents,
>   					    0, 0,		/* no P */
>   					    24, 3,	/* mux */
>   					    BIT(31),	/* gate */
> -					    0, CCU_FEATURE_UPDATE_BIT);
> +					    CLK_IS_CRITICAL,
> +					    CCU_FEATURE_UPDATE_BIT);
>   
>   static const struct clk_hw *mbus_hws[] = { &mbus_clk.common.hw };
>