Re: [PATCH] riscv: vector: fix xtheadvector save/restore

[Palmer Dabbelt]

On Fri, 23 May 2025 02:46:50 PDT (-0700), rabenda.cn@xxxxxxxxx wrote:
> I will release v2 later to add explanation and add fix tag

Sorry if I missed it, but I don't see a v2 (I'm scrubbing through stuff 
post merge window).

> Thanks,
>
> Han
>
> On Fri, May 23, 2025 at 4:54 PM Alexandre Ghiti <alex@xxxxxxxx> wrote:
> > Hi Han,
> >
> > On 5/22/25 19:27, Han Gao wrote:
> > > Fix [1] save/restore vector register error
> > >
> > > Link: https://lore.kernel.org/all/20241113-xtheadvector-v11-9-236c22791ef9@xxxxxxxxxxxx/ [1]
> >
> >
> > Would you mind rephrasing the log? It should explain what was wrong and
> > how you fixed it.
> >
> > Thanks,
> >
> > Alex
> >
> >
> > >
> > > Signed-off-by: Han Gao <rabenda.cn@xxxxxxxxx>
> > > ---
> > >   arch/riscv/include/asm/vector.h | 12 ++++++------
> > >   1 file changed, 6 insertions(+), 6 deletions(-)
> > >
> > > diff --git a/arch/riscv/include/asm/vector.h b/arch/riscv/include/asm/vector.h
> > > index e8a83f55be2b..7df6355023a3 100644
> > > --- a/arch/riscv/include/asm/vector.h
> > > +++ b/arch/riscv/include/asm/vector.h
> > > @@ -200,11 +200,11 @@ static inline void __riscv_v_vstate_save(struct __riscv_v_ext_state *save_to,
> > >                       THEAD_VSETVLI_T4X0E8M8D1
> > >                       THEAD_VSB_V_V0T0
> > >                       "add            t0, t0, t4\n\t"
> > > -                     THEAD_VSB_V_V0T0
> > > +                     THEAD_VSB_V_V8T0
> > >                       "add            t0, t0, t4\n\t"
> > > -                     THEAD_VSB_V_V0T0
> > > +                     THEAD_VSB_V_V16T0
> > >                       "add            t0, t0, t4\n\t"
> > > -                     THEAD_VSB_V_V0T0
> > > +                     THEAD_VSB_V_V24T0
> > >                       : : "r" (datap) : "memory", "t0", "t4");
> > >       } else {
> > >               asm volatile (
> > > @@ -236,11 +236,11 @@ static inline void __riscv_v_vstate_restore(struct __riscv_v_ext_state *restore_
> > >                       THEAD_VSETVLI_T4X0E8M8D1
> > >                       THEAD_VLB_V_V0T0
> > >                       "add            t0, t0, t4\n\t"
> > > -                     THEAD_VLB_V_V0T0
> > > +                     THEAD_VLB_V_V8T0
> > >                       "add            t0, t0, t4\n\t"
> > > -                     THEAD_VLB_V_V0T0
> > > +                     THEAD_VLB_V_V16T0
> > >                       "add            t0, t0, t4\n\t"
> > > -                     THEAD_VLB_V_V0T0
> > > +                     THEAD_VLB_V_V24T0
> > >                       : : "r" (datap) : "memory", "t0", "t4");
> > >       } else {
> > >               asm volatile (