Re: [PATCH v1 3/7] dt-bindings: interrupt-controller: add generic Risc-v aclint-sswi

[Vladimir Kondratiev]

>> Link: https://github.com/riscvarchive/riscv-aclint [1]
>What is the ratification status of this spec?

This spec is in a "draft" state, and perspective for its ratification is unclear.
So I understand I can't use "riscv," prefixes, I will convert it to adding
platform-specific variant of the SSWI, and submit v2.

>s/Risc-V/RISC-V/g

Yes sure

>> +    oneOf:
>> +      - items:
>> +          - enum:
>> +              - sophgo,sg2044-aclint-sswi
>> +          - const: thead,c900-aclint-sswi
>> +      - items:
>> +          - const: riscv,aclint-sswi
>You need a specific compatible for your implementation.

Yes, doing this

>Whether or not this compatible is viable depends on the answer to the
>ratification status and/or plan for the spec.

Replacing "riscv," compatible with platform-specific one

>> +  interrupts-extended:
>> +    minItems: 1
>> +    maxItems: 4095
>> +
>> +  riscv,hart-indexes:
>> +    $ref: /schemas/types.yaml#/definitions/uint32-array
>> +    minItems: 1
>> +    maxItems: 16384
>maxItems is 4x what is allowed for interrupts-extended. Why?

Fixing this. It was copied from the dt-bindings for the APLIC where
maxItems for "interrupts-extended" specified as 16384

>Please constrain this property to only be permitted on !thead.

Doing this

>> +      riscv,hart-indexes = <0 1 0x10 0x11>;
>Please be consistent. Hex or decimal, but not both.

Sure

Thanks, Vladimir