Re: [PATCH v4 3/5] net: phy: qcom: at803x: Add Qualcomm IPQ5018 Internal PHY support

[Russell King (Oracle)]

On Mon, Jun 09, 2025 at 03:44:36PM +0400, George Moussalem via B4 Relay wrote:
> +static int ipq5018_config_init(struct phy_device *phydev)
> +{
> +	struct ipq5018_priv *priv = phydev->priv;
> +	u16 val = 0;

Useless initialisation. See the first statement below which immediately
assigns a value to val. I've no idea why people think local variables
need initialising in cases like this, but it seems to have become a
common pattern. I can only guess that someone is teaching this IMHO bad
practice.

> +
> +	/*
> +	 * set LDO efuse: first temporarily store ANA_DAC_FILTER value from
> +	 * debug register as it will be reset once the ANA_LDO_EFUSE register
> +	 * is written to
> +	 */
> +	val = at803x_debug_reg_read(phydev, IPQ5018_PHY_DEBUG_ANA_DAC_FILTER);
> +	at803x_debug_reg_mask(phydev, IPQ5018_PHY_DEBUG_ANA_LDO_EFUSE,
> +			      IPQ5018_PHY_DEBUG_ANA_LDO_EFUSE_MASK,
> +			      IPQ5018_PHY_DEBUG_ANA_LDO_EFUSE_DEFAULT);
> +	at803x_debug_reg_write(phydev, IPQ5018_PHY_DEBUG_ANA_DAC_FILTER, val);
> +
> +	/* set 8023AZ CTRL values */
> +	phy_write_mmd(phydev, MDIO_MMD_PCS, IPQ5018_PHY_PCS_AZ_CTRL1,
> +		      IPQ5018_PHY_PCS_AZ_CTRL1_VAL);
> +	phy_write_mmd(phydev, MDIO_MMD_PCS, IPQ5018_PHY_PCS_AZ_CTRL2,
> +		      IPQ5018_PHY_PCS_AZ_CTRL2_VAL);

The comment doesn't help understand what's going on here, neither do the
register definition names.

Also, what interface modes on the host side does this PHY actually
support?

> +	priv->rst = devm_reset_control_array_get_exclusive(dev);
> +	if (IS_ERR_OR_NULL(priv->rst))
> +		return dev_err_probe(dev, PTR_ERR(priv->rst),
> +				     "failed to acquire reset\n");

Why IS_ERR_OR_NULL() ? What error do you think will be returned by this
if priv->rst is NULL? (Hint: PTR_ERR(NULL) is 0.)

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