[PATCH 10/11] riscv: dts: sophgo: add SG2044 SPI NOR controller driver

From: Inochi Amaoto
Date: Sun Jun 08 2025 - 19:32:43 EST


From: Longbin Li <looong.bin@xxxxxxxxx>

Add SPI NOR device node for SG2044.

Signed-off-by: Longbin Li <looong.bin@xxxxxxxxx>
Signed-off-by: Inochi Amaoto <inochiama@xxxxxxxxx>
---
arch/riscv/boot/dts/sophgo/sg2044.dtsi | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)

diff --git a/arch/riscv/boot/dts/sophgo/sg2044.dtsi b/arch/riscv/boot/dts/sophgo/sg2044.dtsi
index be20efd8e2ac..b65e491deb8f 100644
--- a/arch/riscv/boot/dts/sophgo/sg2044.dtsi
+++ b/arch/riscv/boot/dts/sophgo/sg2044.dtsi
@@ -32,6 +32,30 @@ soc {
#size-cells = <2>;
ranges;

+ spifmc0: spi@7001000000 {
+ compatible = "sophgo,sg2044-spifmc-nor";
+ reg = <0x70 0x01000000 0x0 0x4000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clk CLK_GATE_AHB_SPIFMC>;
+ interrupt-parent = <&intc>;
+ interrupts = <37 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst RST_SPIFMC0>;
+ status = "disabled";
+ };
+
+ spifmc1: spi@7005000000 {
+ compatible = "sophgo,sg2044-spifmc-nor";
+ reg = <0x70 0x05000000 0x0 0x4000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clk CLK_GATE_AHB_SPIFMC>;
+ interrupt-parent = <&intc>;
+ interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst RST_SPIFMC1>;
+ status = "disabled";
+ };
+
dmac0: dma-controller@7020000000 {
compatible = "snps,axi-dma-1.01a";
reg = <0x70 0x20000000 0x0 0x10000>;
--
2.49.0