Re: [PATCH 9/9] ARM: dts: microchip: sama7d65: Enable CAN bus

From: Claudiu Beznea
Date: Sat Jun 07 2025 - 07:44:52 EST




On 12.05.2025 22:27, Ryan.Wanner@xxxxxxxxxxxxx wrote:
> From: Ryan Wanner <Ryan.Wanner@xxxxxxxxxxxxx>
>
> Enable CAN bus for SAMA7D65 curiosity board.
>
> Signed-off-by: Ryan Wanner <Ryan.Wanner@xxxxxxxxxxxxx>
> ---
> .../dts/microchip/at91-sama7d65_curiosity.dts | 35 +++++++++++++++++++
> 1 file changed, 35 insertions(+)
>
> diff --git a/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts b/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts
> index 53a657cf4efb..34935179897e 100644
> --- a/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts
> +++ b/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts
> @@ -38,7 +38,24 @@ reg_5v: regulator-5v {
> regulator-max-microvolt = <5000000>;
> regulator-always-on;
> };
> +};
> +

Please drop the empty line in a different patch.

> +&can1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_can1_default>;
> + status = "okay";
> +};
>
> +&can2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_can2_default>;
> + status = "okay";
> +};
> +
> +&can3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_can3_default>;
> + status = "okay";
> };
>
> &dma0 {
> @@ -278,6 +295,24 @@ &main_xtal {
> };
>
> &pioa {
> + pinctrl_can1_default: can1-default {
> + pinmux = <PIN_PD10__CANTX1>,
> + <PIN_PD11__CANRX1>;

The "<" on on this line would have to be aligned with the one on the
previous line. Same for the other places in this patch.

I can address all these minor bits while applying, if any.

Other than this:

Reviewed-by: Claudiu Beznea <claudiu.beznea@xxxxxxxxx>

> + bias-disable;
> + };
> +
> + pinctrl_can2_default: can2-default {
> + pinmux = <PIN_PD12__CANTX2>,
> + <PIN_PD13__CANRX2>;
> + bias-disable;
> + };
> +
> + pinctrl_can3_default: can3-default {
> + pinmux = <PIN_PD14__CANTX3>,
> + <PIN_PD15__CANRX3>;
> + bias-disable;
> + };
> +
> pinctrl_gmac0_default: gmac0-default {
> pinmux = <PIN_PA26__G0_TX0>,
> <PIN_PA27__G0_TX1>,